Digital Signal Processing

   

Design of Low Noise Amplifier at 435MHz in Sub-Micron Technologies Using Microwind Layout, Simulation and Parasitic Capabilities

Authors: Sai Venkatesh Balasubramanian, Thrikandiyoor Jayadev

The importance attached to filtering noise out of signal is growing significantly due to the requirement for faster and improved communication systems such as high-speed Internet access and wireless communication. The low-noise amplifier (LNA) is one of the major components in a wireless communication system, employed at the receiver side and is usually the immediate component to the Antenna in the receiver chain. This report attempts to explain the design of a low-noise-amplifier according to specifications. Using 0.35 μm technology to build the layout and the opes-source layout design tool - Microwind to simulate its operation, the performance of the LNA was optimized through the use of different circuit topologies and components. Based on the results obtained from simulation, the components were varied and sized to reach the desired results. The other aspect of the design process that was explored was effect of parasitics to assess the impact of physical structure and it's impact on the over all operation the LNA. To execute this task, the in-built parasitic extraction tool of Microwind was used. To a large extent, the objectives were met, thereby satisfying the requirements of the project. This include meeting the peak gain requirement of 22dB at the desired frequency of 435MHz, an input impedance of 50 ohms and a high output impedance with good noise removal characteristics. However, further study is proposed to explore the use of the Microwind design tool in designing complex analog circuitry and also using the circuit model in many other applications.

Comments: 36 Pages.

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Submission history

[v1] 2016-01-12 20:23:49

Unique-IP document downloads: 112 times

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