Digital Signal Processing

   

Soliton based Return to Zero Logic using 180nm CMOS

Authors: Sai Venkatesh Balasubramanian

A Return-to-Zero Logic consisting of Soliton based clock is proposed, and is seen to exhibit more robustness in propagation through interconnects compared with conventional square pulses at microwave and illimetre wave frequencies. The generation of solitons using the nonlinearity of a single transistor is discussed and various combinational and sequential logic circuits based on soliton logic are implemented and characterized using Deep Submicron VLSI SPICE implementations at 180nm CMOS Technology. In addition, Pulse Compression based on single transistor is also discussed. The simplicity of implementation of the soliton logic, coupled with the compatibility with existing CMOS technologies form the key highlights of the present work, paving the way for a futuristic low distortion computing era.

Comments: 12 Pages.

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Submission history

[v1] 2015-10-27 09:04:47

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