Dynamic Partial Reconfiguration (DPR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire system interruption. In this thesis, we have implemented a line follower robot for the white line as well as for black line, both these modules are programmed in VHDL. The robot are made to run for white line and it will dynamically reconfigure the FPGA in the run-time for the black line or vice-versa. This design includes two modules one is static and the other is partially reconfigurable regions (PRR) which is a dynamic region. The controllers are the static modules used for controlling the flow of data to and from the reconfigurable modules to the external world (host environment) through busmacros. Whereas white line and black line modules are designed as dynamic modules.
Comments: 8 Pages.
[v1] 2012-08-19 00:36:00
Unique-IP document downloads: 175 times
Add your own feedback and questions here:
You are equally welcome to be positive or negative about any paper but please be polite. If you are being critical you must mention at least one specific error, otherwise your comment will be deleted as unhelpful.